Samsung 1.6A: Gate-All-Around Hits Production, Shrinking AI Edge Chips Again

Samsung just started mass production of chips using its 1.6A process node, the first commercial sub-2nm node with full Gate-All-Around (GAA) transistors. Why is this such a big deal? Because GAA allows for tighter channel control, lower leakage, and much higher drive currents — exactly what edge AI accelerators and mobile NPUs need to compete against cloud hardware.

The Technical Leap

Engineers have talked about GAA for years, but everyone expected 2nm to be the practical floor. Samsung’s 1.6A pushed below that by using nanosheet stacking and self-aligned contacts, which shrink SRAM bitcells and logic gates together. The result: smaller die, lower power, and enough headroom for on-die AI SRAM caches and larger ML accelerator blocks — without pushing TDP through the roof.

The real play here isn’t just for phones. Think automotive MCUs, AR glasses, and private AI coprocessors that need to fit inside a dongle or smart camera. 1.6A’s power efficiency means you can get stable 20+ TOPS/watt in a form factor the size of a postage stamp, with all the security and privacy of local inferencing.

The Engineering Impact

If you’re building edge AI hardware, it’s time to look past TSMC’s 2nm and adapt for GAA-based PDKs. The SRAM scaling especially matters for quantized model weights — you can fit more model or cache, or drop your voltage floor for always-on tasks. Software people: expect the next wave of edge AI to run larger models locally, because now the silicon isn’t the bottleneck.